Programming Research Group Technical Report TR-3-91

Deriving bit-serial circuits in Ruby

Geraint Jones and Mary Sheeran (Univ. Glasgow).

February 1991, 10pp.

The action of bit-serial arithmetic circuits is often explained in purely pictorial terms. In contrast, this paper describes an attempt to deal with the systematic development of bit-serial arithmetic circuits within a mathematical framework which we have previously used to develop parallel circuits. A well-known bit-serial adder is formally shown to implement the specification of an adder, without any recourse to detailed arguments about snapshots or specific arguments about sequences of inputs.

This paper was presented at VLSI 91, Edinburgh, Scotland, 20-22 August 1991. and has also been published in IFIP Transactions A-1, VLSI 91, eds. Arne Halaas and Peter B Denyer, North-Holland, 1992.

It is available as a 53,002 byte compressed PostScript file.