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Long−Wire Leakage: The Threat of Crosstalk

Ilias Giechaskiel‚ Kasper Rasmussen and Ken Eguro


With Field-Programmable Gate Arrays (FPGAs) becoming larger, heterogeneous, and more widely available in data center environments, it is important to consider how low-level hardware choices can affect the security of user designs. An example of an electrical effect that can compromise sensitive data through covert- and side-channel attacks is capacitive crosstalk between long routing wires connecting logic resources that are physically far apart within the same Integrated Circuit (IC). This article summarizes recent developments showing that this novel source of information leakage is present on Xilinx and Intel FPGAs, as well as Application-Specific Integrated Circuits (ASICs). It can be exploited in devices spanning several technology nodes and architectures, does not require physical access to the FPGA board, and can be measured using just on-chip resources. This article further presents existing software- and hardware-based defense mechanisms, and identifies open questions and future research directions. Overall, this article highlights the shift in the system and adversary model used in analyzing hardware security, and therefore the need for new IC designs to incorporate countermeasures protecting against the threats arising from multi-tenant occupancy of chips.

IEEE Design and Test