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Four−level realization of 3−qubit reversible functions

Jacob Biamonte Guowu Yang Xiaoyu Song Marek A. Perkowski William N. N. Hung and Zhiwei Tang

Abstract

Two questions have been addressed here: how many logic levels are necessary to synthesise a specific instance of a reversible circuit, and how much better to have large gate libraries, and what gates should be required in libraries. Group theory is applied to 3-bit reversible gate synthesis to create a library useful in hierarchical design. It has been shown that arbitrary 3-bit reversible circuit can be synthesised with four-logic levels, using this new gate library. The respective universal library for the four-level synthesis is constructed and optimised it on the level of nuclear magnetic resonance pulses. A very fast algorithm to synthesise arbitrary 3-bit reversible function to gates from our library is also presented. The algorithm demonstrates dramatic speed benefit and results in a maximum of four-level circuit for arbitrary 3-bit reversible function. The gates are optimised on the level of pulses to decrease their cost and allow for objective comparison with standard CNOT, NOT, Toffoli gates (CNT) circuits. This library guarantees a four-level circuit for any 3-qubit reversible function and is also intended to be used in a hierarchical design of larger circuits.

Affiliation
University of Electronic Science and Technology of China‚ School of Computer Science and Engineering‚ Chengdu‚ People's Republic of China
Journal
IET Computers and Digital Techniques
Number
4
Pages
382–388
Volume
1
Year
2007