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Computer-Aided Formal Verification:  2017-2018

Lecturer

Degrees

Schedule S1(CS&P)Computer Science and Philosophy

Schedule B2 (CS&P)Computer Science and Philosophy

Schedule S1Computer Science

Schedule B2Computer Science

Schedule S1(M&CS)Mathematics and Computer Science

Schedule B2Mathematics and Computer Science

Schedule BMSc in Computer Science

MSc in Mathematics and Foundations of Computer Science

Term

Overview

This course introduces the fundamentals of computer-aided formal verification. Computer-aided formal verification aims to improve the quality of digital systems by using logical reasoning, supported by automated software tools, to analyse their designs. The idea is to build a mathematical model of a system and then try to prove formal properties of it that validate the system's correctness, or at least that help discover subtle bugs. The proofs can be millions of lines long, so specially-designed computer algorithms are used to search for and check them. Properties are formalised as formulae in proper temporal logics.

This course provides a survey of several major software-assisted verification methods, covering both theory and practical applications. The aim is to familiarise students with the mathematical principles behind current verification technologies, and provide them with an appreciation of how these technologies are used in industrial system design today.

Synopsis

  1. Introduction to CAFV 
  2. Modelling sequential systems as labelled transition systems (Kripke structures)
  3. Linear time properties 
  4. Linear temporal logic (LTL) 
  5. Computation tree logic (CTL) and CTL*  
  6. Model checking CTL 
  7. Model checking LTL
  8. Counterexamples and witnesses 
  9. Binary decision diagrams (BDD) 
  10. Symbolic model checking 
  11. Model checking with SAT, bounded model checking 
  12. Completeness thresholds and k-induction 
  13. Craig interpolation 
  14. Equivalences and abstractions 
  15. Decision procedures in model checking 
  16. Practical, industrial-scale verification; present challenges 

Syllabus

Introduction to computer-aided formal verification. Modelling sequential systems as labelled transition systems (Kripke structures). Linear time properties. Linear temporal logic (LTL). Computation tree logic (CTL) and CTL*. Model checking CTL. Model checking LTL. Counterexamples and witnesses. Binary decision diagrams (BDD). Symbolic model checking. Model checking with SAT, bounded model checking. Completeness thresholds and k-induction. Craig interpolation. Equivalences and abstractions. Decision procedures in model checking. Practical, industrial-scale verification; present challenges 

Reading list

The lectures will be supplemented with notes and pointers to published articles in the field. The following may be helpful for reference or further reading on specific topics.

Surveys

Temporal Logics 

Binary Decision Diagrams and SAT

Model Checking

  • Logic in Computer Science: Modelling and reasoning about systems, by Michael Huth and Mark Ryan (Cambridge University Press, 2000) 
  • Model Checking, by Edmund M. Clarke, Jr., Orna Grumberg, and Doron A. Peled, Second edition (The MIT Press, 2000) 
  • Principles of Model Checking, by C. Baier and J.-P. Katoen (The MIT Press, 2008)

Related research at the Department of Computer Science

Themes

Activities