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AI Computing Architectures and the Impact on Memory and Storage

Stephen S. Pawlowski ( Micron Technology )

Data growth is driving significant changes in computing architecture. Systems will be driven by vast amounts of data and the potential economic value of that data.

Current system bottlenecks will only get ‘worse’. As data size and complexity of the data sets grows, Deep Learning solutions will be prominent. Market driven use cases will inform the next gen AI compute, memory and storage architectures. The solutions that have the greatest chances of leading in this space need to be scalable and flexible without compromising on performance efficiency. Network algorithms will evolve, optimizations will be needed, co-locating memory and computing will drive performance/watt efficiencies. But we need to keep the user in mind - complexity is rarely our ally and the solution that wins is the one that’s easiest to program!

Bio: Steve Pawlowski is advanced computing solutions vice president at Micron Technology. He is responsible for defining and developing innovative memory solutions for the enterprise and high-performance computing markets. Prior to joining Micron in July 2014, Mr. Pawlowski was a senior fellow and the chief technology officer for Intel’s Data Center and Connected Systems Group. Mr. Pawlowski’s extensive industry experience includes 31 years at Intel, where he held several high-level positions and led teams in the design and development of next-generation system architectures and computing platforms. Mr. Pawlowski earned bachelor’s degrees in electrical engineering and computer systems engineering technology from the Oregon Institute of Technology and a master’s degree in computer science and engineering from the Oregon Graduate Institute. He also holds 58 patents.



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