MLIR: An Optimizing Compiler Framework for the End of Moore's Law
- 11:00 4th December 2019 ( Michaelmas Term 2019 )Lecture Theatre B, Department of Computer Science, Wolfson Building, Parks Road, Oxford OX1 3QD
The growing diversity of domain-specific accelerators spans all scales from mobile devices to data centers. It constitutes a global challenge across the High-Performance Computing (HPC) stack and is particularly visible in the field of Machine Learning (ML). Compilers need to support a variety of devices at multiple levels of abstraction, from scalar instructions to coarse-grained parallelism and the large scale distribution of computation graphs. This challenges the construction of both generic and target-specific optimizations, calling for domain specific language support, revisiting interfaces with legacy infrastructure, with special attention to future-proofness, modularity and code reuse. We address these challenges through the design and implementation of a new compiler construction infrastructure. It unifies graph representations and operators in HPC and ML, optimizations at different levels and also across levels, targets and execution environments. The proposed infrastructure aims to dramatically improve the experience of building compilers supporting new application areas, ports to new and heterogeneous hardware, tool flows bridging many levels of abstraction from dynamic, managed languages to vector accelerators and software-controlled memories, while exposing high level knobs for autotuning, enabling just-in-time operation, providing rich diagnostics, propagating functional and performance debugging information across the entire stack, and delivering performance close to the peak hardware performance on the most critical computational tasks. We will share our vision, progress and plans towards the design and implementation of MLIR, zooming in on graph-level and loop nest optimization as illustrative examples.
Bio: Albert Cohen is a research scientist at Google. He has been a research scientist at Inria from 2000 to 2018. He graduated from École Normale Supérieure de Lyon and received his PhD from the University of Versailles in 1999 (awarded two national prizes). He has been a visiting scholar at the University of Illinois, an invited professor at Philips Research, and a visiting scientist at Facebook Artificial Intelligence Research. Albert Cohen works on parallelizing and optimizing compilers, parallel programming languages and systems, and synchronous programming for reactive control systems. He served as the general or program chair of some of the main conferences in the area and a member of the editorial board of two journals. He co-authored more than 180 peer-reviewed papers and has been the advisor for 26 PhD theses. Several research projects led by Albert Cohen resulted in effective transfer to production compilers and programming environments.