Peter Boehm : Publications
Journal papers
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[1]
Incremental and Verified Modelling of the PCI Express Protocol
Peter Böhm
In IEEE Transactions on Computer−aided Design of Integrated Circuits and Systems. 2010.
14 pages‚ to appear
Details about Incremental and Verified Modelling of the PCI Express Protocol | BibTeX data for Incremental and Verified Modelling of the PCI Express Protocol
Conference papers
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[1]
A Framework for Incremental Modelling and Verification of On−Chip Protocols
Peter Böhm
In Proceedings of the Tenth Conference on Formal Methods in Computer Aided Design (FMCAD'10). October, 2010.
8 pages‚ to appear
Details about A Framework for Incremental Modelling and Verification of On−Chip Protocols | BibTeX data for A Framework for Incremental Modelling and Verification of On−Chip Protocols
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[2]
A Formalised Framework for Incremental Modelling of On−Chip Communication
Peter Böhm
In Participants' Proceedings of the Eighth International Workshop on Designing Correct Circuits (DCC'08)‚ a satellite event of the ETAPS 2010 conferences. March, 2010.
to appear
Details about A Formalised Framework for Incremental Modelling of On−Chip Communication | BibTeX data for A Formalised Framework for Incremental Modelling of On−Chip Communication
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[3]
Incremental Modelling and Verification of the PCI Express Transaction Layer
Peter Böhm
In Proceedings of the Seventh ACM−IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'09). Pages 36–45. IEEE Computer Society. July, 2009.
Details about Incremental Modelling and Verification of the PCI Express Transaction Layer | BibTeX data for Incremental Modelling and Verification of the PCI Express Transaction Layer | DOI (10.1109/MEMCOD.2009.5185376)
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[4]
A Refinement Approach to Design and Verification of On−Chip Communication Protocols
Peter Böhm and Tom Melham
In Proceedings of the Eighth Conference on Formal Methods in Computer−Aided Design (FMCAD'08). Pages 136–143. IEEE Computer Society. November, 2008.
Details about A Refinement Approach to Design and Verification of On−Chip Communication Protocols | BibTeX data for A Refinement Approach to Design and Verification of On−Chip Communication Protocols | DOI (10.1109/FMCAD.2008.ECP.22)
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[5]
Formal Correctness of an Automotive Bus Controller Implementation at Gate−Lavel
Eyad Alkassar‚ Peter B"ohm and Steffen Knapp
In Bernd Kleinjohann‚ Lisa Kleinjohann and Wayne Wolf, editors, Distributed Embedded Systems: Design‚ Middleware and Resources − IFIP 20th World Computer Congress‚ TC 10 Working Conference on Distributed and Parallel Embedded Systems (DIPES'08). Vol. 271/2008. Pages 57–67. Springer Science and Business Media. 2008.
Details about Formal Correctness of an Automotive Bus Controller Implementation at Gate−Lavel | BibTeX data for Formal Correctness of an Automotive Bus Controller Implementation at Gate−Lavel | DOI (10.1007/978-0-387-09661-2_6)
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[6]
Correctness of a Fault−Tolerant Real−Time Scheduler and its Hardware Implementation
Eyad Alkassar‚ Peter Böhm and Steffen Knapp
In Sixth ACM & IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'08). Pages 175–186. IEEE Computer Society. June, 2008.
Details about Correctness of a Fault−Tolerant Real−Time Scheduler and its Hardware Implementation | BibTeX data for Correctness of a Fault−Tolerant Real−Time Scheduler and its Hardware Implementation | DOI (10.1109/MEMCOD.2008.4547708)
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[7]
Towards the Formal Verification of Lower System Layers in Automotive Systems
Sven Beyer‚ Peter Böhm‚ Michael Gerke‚ Mark Hillebrand‚ Thomas In der Rieden‚ Steffen Knapp‚ Dirk Leinenbach and Wolfgang J. Paul
In 23rd International Conference on Computer Design (ICCD '05). Pages 317–324. IEEE Computer Society. 2005.
Details about Towards the Formal Verification of Lower System Layers in Automotive Systems | BibTeX data for Towards the Formal Verification of Lower System Layers in Automotive Systems
Technical reports
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[1]
Design and Verification of On−Chip Communication Protocols
Peter Böhm and Tom Melham
No. RR−08−05. OUCL. April, 2008.
Details about Design and Verification of On−Chip Communication Protocols | BibTeX data for Design and Verification of On−Chip Communication Protocols | Download (pdf) of Design and Verification of On−Chip Communication Protocols | Link to Design and Verification of On−Chip Communication Protocols
Theses
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[1]
Formal Verification of a Clock Synchronization Method in a Distributed Automotive System
Peter Böhm
Master's Thesis Dept. of Computer Science‚ Saarland University. 2007.
Details about Formal Verification of a Clock Synchronization Method in a Distributed Automotive System | BibTeX data for Formal Verification of a Clock Synchronization Method in a Distributed Automotive System